NASA's New Space Chip Boasts 500x Power for Missions

NASA has begun testing a next-generation processor that promises to dramatically boost computing capabilities for future space missions, potentially allowing spacecraft to react autonomously to critical situations in real-time. The High Performance Spaceflight Computing project initiated trials of this cutting-edge chip in February with a symbolic "Hello Universe" email.

The new processor has demonstrated initial results indicating it operates at a staggering 500 times the computational power of processors currently utilized in space. This leap in performance is crucial for advancing NASA's goals, including autonomous spacecraft operations, accelerated scientific analysis, and supporting upcoming crewed missions to the Moon and Mars.

Unlike standard commercial processors, components designed for spacecraft must be radiation-hardened to withstand the harsh conditions of space, including extreme temperatures and cosmic radiation that can corrupt data. While NASA has relied on proven, older chip designs that offer durability and reliability, an upgrade is essential to meet the demands of modern space exploration.

Enabling Autonomous Spacecraft and Deeper Exploration

"Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," stated Eugene Schwanbeck, program element manager in NASA's Game Changing Development program at the Langley Research Center. "NASA’s commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration."

Developed in partnership with Microchip Technology, the new processor is a high-performance system-on-a-chip (SoC) designed to deliver up to 100 times the capacity of current flight computers while enduring the rigors of space. This palm-sized chip integrates essential computer components like central processing units, memory, and advanced networking capabilities, enabling sophisticated onboard processing.

The technology is specifically engineered to support artificial intelligence systems, empowering spacecraft to independently manage unexpected events without immediate guidance from ground control teams. This autonomy is vital for deep space endeavors, where communication delays can be substantial, allowing missions to analyze, store, and transmit vast amounts of data more effectively.

Engineers at NASA’s Jet Propulsion Laboratory (JPL) in Southern California are currently subjecting the new processor to rigorous testing, simulating the extreme electromagnetic radiation, temperature fluctuations, and high-energy particle bursts characteristic of the space environment. These conditions can cause spacecraft to enter a "safe mode," halting operations until mission controllers on Earth intervene.

"We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," said Jim Butler, High Performance Space Computing project manager at JPL. "To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data."

The testing regimen also includes evaluating the chip's resilience during simulated planetary landings, a critical phase for many robotic explorers. The processor must handle immense data loads from landing sensors reliably.

Further validation of the next-generation processor will continue over the coming months. Upon successful certification, NASA plans to integrate this advanced chip into the computing architecture of various missions, including Earth-orbiting satellites, planetary rovers, crewed habitats, and deep-space probes, marking a significant step forward for space exploration and innovation.

"This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps," Butler added, highlighting the transformative potential of this technological advancement for future endeavors in AI and robotics.