NASA Tests Powerful New Space Processor 100x Faster Than Current Tech

NASA's Jet Propulsion Laboratory (JPL) in Southern California has commenced rigorous testing of a next-generation space processor, a pivotal component of the High Performance Spaceflight Computing (HPSC) project. This advanced chip promises to deliver up to 100 times the computational capacity of current spaceflight computers, while being engineered to withstand the harsh conditions of outer space, including intense radiation, extreme temperature fluctuations, and physical shock.

The testing regimen at JPL, which began in February 2026 and is slated to continue for several months, is designed to push the processor to its limits. "We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," stated Jim Butler, High Performance Space Computing project manager at JPL. The processor must demonstrate resilience against cosmic radiation, which can induce errors causing spacecraft to enter a "safe mode," and survive drastic environmental shifts that can degrade electronic components.

Simulating Extreme Environments

The challenges extend to planetary landings, where immense processing power is needed to handle vast amounts of sensor data. "To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data," Butler explained. Early results have exceeded expectations, with the processor demonstrating operational speeds up to 500 times faster than the radiation-hardened chips currently in use, marking a significant milestone in spaceborne computation. The team symbolically marked the start of testing by sending an email with the subject line "Hello Universe," a nod to early computing traditions.

This cutting-edge processor, a system-on-a-chip (SoC) developed in partnership with Microchip Technology Inc. of Chandler, Arizona, integrates essential computer components like central processing units, memory, and advanced networking interfaces into a compact, palm-sized unit. While SoCs are common in consumer electronics, the HPSC processor is specifically built for longevity and reliability in deep space, millions of miles from any possibility of repair. This level of durability is critical for enabling autonomous spacecraft to utilize artificial intelligence for real-time decision-making in complex, unpredictable environments where human intervention is impossible.

The anticipated benefits are far-reaching. For deep space exploration, the processor will significantly accelerate the pace of scientific discovery by enabling spacecraft to analyze, store, and transmit unprecedented volumes of data back to Earth. Beyond robotic missions, it holds the potential to support future human endeavors on the Moon and Mars, providing the computational backbone for life support, navigation, and scientific research. NASA's Game Changing Development (GCD) program, managed at NASA Langley, and JPL led the technology's maturation, selecting Microchip as a partner in 2022 and guiding the project through its development lifecycle. The GCD program and JPL, a division of Caltech, funded the end-to-end development, with Microchip investing its own resources into the processor's research and development.

Once formally certified for spaceflight, NASA plans to integrate the HPSC processor into the computing hardware for a wide array of missions, including Earth-orbiting satellites, planetary rovers, crewed habitats, and ambitious deep space observatories. The technology's adaptability is also expected to yield benefits for Earth-bound industries, with Microchip intending to adapt it for applications in aviation and automotive manufacturing. This dual-purpose innovation underscores NASA's commitment to pushing the boundaries of space exploration while simultaneously fostering advancements that can revolutionize terrestrial technologies.